Computationally efficient quantum-mechanical technique to calculate the direct tunneling gate current in metal-oxide-semiconductor structures

We propose a computationally efficient, accurate and numerically stable quantum-mechanical technique to calculate the direct tunneling ~DT! gate current in metal-oxide-semiconductor ~MOS! structures. Knowledge of the imaginary part G of the complex eigenenergy of the quasi-bound inversion layer states is required to estimate the lifetimes of these states. Exploiting the numerically obtained exponential dependence of G on the thickness of the gate-dielectric layer even in the sub-1-nm-thickness regime, we have simplified the determination of G in devices where it is too small to be calculated directly. It is also shown that the MOS electrostatics, calculated self-consistently with open boundary conditions, is independent of the dielectric layer thickness provided that the other parameters remain unchanged. Utilizing these findings, a computationally efficient and numerically stable method is developed for calculating the tunneling current–gate voltage characteristics. The validity of the proposed model is demonstrated by comparing simulation results with experimental data. Sample calculations for MOS transistors with high-K gate-dielectric materials are also presented. This model is particularly suitable for DT current calculation in devices with thicker gate dielectrics and in device or process characterization from the tunneling current measurement. © 2003 American Institute of Physics. @DOI: 10.1063/1.1589173#